A semiconductor device when packaged is normally mounted on a cooling plate or heat sink to dissipate heat emitted from the semiconductor device. Between the semiconductor device and the heat sink, a substrate member, namely a submount having high conductivity may be interposed to improve the heat radiation property. Such a high heat conductivity substrate member is known to be made of aluminum nitride or the like.
When the submount and a semiconductor device are soldered together, one requirement to be met is their bonding strength. The prior art has provided an adherent layer of an expensive noble metal to this end, or has adjusted the surface roughness of a substrate member itself in order to enhance the bonding strength between the substrate and an electrode layer disposed beneath the bottom of a solder layer.
Patent Reference 1 discloses a submount in which a substrate is coated with metal layers of Ti, Pt and Au laid in turn and in particular a structure thereof that a semiconductor light emitting device is mounted on Au via a solder adherent layer made of Ti and Pt and a solder layer. In this Reference, the solder layer and the semiconductor light emitting device soldered together have their bonding strength of 40 MPa or more and the substrate used for the submount has a surface roughness (Ra) preferably of 1 μm or less, more preferably of 0.1 μm or less. When the surface roughness of 1 μm is exceeded, it is stated that a clearance tends to be formed between the device and the submount when soldered together, thereby lowering the cooling effect of the semiconductor light emitting device.
Patent Reference 2 discloses a submount having a substrate of AlN coated with Ti, Pt and Au metal layers formed in turn and in particular comparative examples therein showing that the AlN substrate when made having a surface roughness (Ra) of 0.1 to 0.5 μm offers a submount which can withstand thermal cycling with its effect to anchor the formed metals and has high strength of their bonding to the substrate. It is also disclosed that the AlN substrate when made to have an excessively low surface roughness is unable to yield enough strength of the bonding. As a substrate material high in thermal conductivity, mention may be of aluminum nitride or the like (see, for example, Patent Reference 3).
Patent References 3, 4 and 5 infra disclose a submount for optical semiconductor device which has a first surface on which a semiconductor laser (LD) chip is mounted and a second surface which is soldered with a metal block heat sink, both of which surfaces are each formed with a barrier layer and an alloy layer of Au and Sn or Sn and Pb. In these References, each of the alloy layers is formed by vapor deposition and has its alloy composition adjusted in a proportion such as, for example, Au:Sn=70:30 (in atomic percent) so that it is a eutectic alloy. The alloy layers are molten to joint the submount with the LD chip and radiating metal block, respectively.
Patent References 3 and 5 disclose a semiconductor laser diode of which a heat generating active layer is soldered with and bonded to a submount to permit improving its heat dissipation property. In this case, the obverse side of the active layer that is very thin as formed by epitaxial growth is bonded with its obverse side facing downwards, that is so-called junction-down to the submount. As a result, a short circuiting failure is liable to occur due to the fact that at the time of soldering, solder layer tends to stick to the pn junction.
Thus, the submount is an extremely important component not only to function as soldering when the submount is die-bonded but also to alleviate the distortion of a semiconductor device by the thermal expansion of a heat sink metal block during the die bonding. In order to join this submount with a semiconductor device chip mounted on the submount and with a submount substrate serving as a heat sink, a solder layer has been used which is formed on each side and/or both sides of the submount.
For reducing environmental loads, the use of a solder not containing Pb as the soldering material, namely a Pb free solder, has been well under way, and a solder composition such as of Au—Sn, Ag—Sn, In—Sn or Zn—Sn using its substitute material has been proposed. In the case of a Pb free solder, however, the melting point is higher than that of a Pb solder (183° C. of Pb—Sn) so that its reduced difference from the heatproof temperature may, when a semiconductor device is soldered, give rise to the problem of deterioration of the device. Further, increase in the amount of Sn or In used may make the surface liable to oxidize, adversely affecting wettability of the solder itself as well.
Here, mention is made of wettability between a solder layer and an electrode layer in soldering as one of the most important characteristics to be considered in soldering a semiconductor device with a submount via the solder layer. A Pb free solder normally used is poor in wettability, generally necessitating a rosin flux etc. On the other hand, in the case of solder soldering using a flux as in cream solder or ball solder screen printing, a surface is wetted by the flux so that there is little effect by solder wettability. However, when a solder mass very small in thickness and volume as in a submount is soldered with a semiconductor device likewise very small in thickness and volume, an effect of the flux on the output reliability of the semiconductor device to be soldered cannot be ignored so that the soldering may be effected without the flux. As a result, the solder wettability in the submount has been very poor.
In such a solder layer, especially where it is a solder layer composed of Sn and In constituents as solder materials having low melting points, Sn and In exposed to the surface are liable to oxidize, tending to form on the surface oxides under the influence of which it may become hard to join the solder mass. As a way to overcome this difficulty, it is reported in Nonpatent Reference 1 to place the solder layer containing Sn and In components in a vacuum or reducing atmosphere to remove the oxides prior to soldering.
Nonpatent Reference 2 reports on an Au—Sn system solder layer in which Sn and Au sub-layer are formed one upon another with the uppermost sub-layer constituted by an Au layer so that Sn is not exposed to the top surface. Nonpatent Reference 3 reports on making a multi-layered structure in which Sn is not exposed to the surface as a solder used in bonding Si semiconductor device onto Si substrate. Nonpatent Reference 4 reports on a technique in which while in a submount the solder layer itself is formed of an alloy, Au layer is formed on the solder layer to serve as an anti-oxidant.
When a Pb free solder is used, a layer of the solder has been made having a multi-layered structure such that metal liable to oxidize is not exposed to the surface and having a eutectic composition for soldering. Then, it is reported that because the solder layer itself is in a non-equilibrium state and if left at room temperature goes on to its equilibrium state, metal atoms diffuse easily (see Nonpatent References 5 and 6).
Thus in the prior art, use has been made of a solder layer which before melting is of the form in which it has the structure that a eutectic composition consisting of the solder elements is alloyed (hereinafter, referred to conveniently as alloyed solder layer). To wit, in the step of forming an unmolten solder layer on a submount substrate, a method has generally been employed which adjusts the composition ratio of metal elements constituting the solder layer so that the composition is eutectic. The composition of a solder composed of Sn element and anyone or a combination of metal elements such as Au, Ag and Pb has been adjusted, for example, that of an Au—Sn alloyed solder layer so as to be proportioned Au:Sn=70:30 (in atomic percent).
Further, one of the requirements to be met in soldering a submount and a semiconductor light emitting device together is to decrease variations of their bonding temperature. When a submount and a semiconductor light emitting device are soldered together, a solder layer formed on the submount is heated and molten until it becomes liquid phase and brought into contact with an electrode formed on the side of the semiconductor device and then cooled and solidified, thereby causing the submount and the semiconductor light emitting device to be soldered together via the molten solder layer. Heating the solder layer is done by widespread heating using a resistance heating furnace or heating stage or by localized rapid heating such as localized lamp or hot-gas heating as selected with particular forms of packaging or degrees of workability taken into account. However, if heating is done using localized rapid heating, variations in heating temperature may often occur due to differences in materials of the submount and semiconductor device or in performance of the heaters used. And, if the temperature of the heater is designed to reach is lower than a targeted bonding temperature, the failure such as unmolten bonding or insufficient wetting in solder would tend to occur. Conversely, if the temperature of the heater is higher than the targeted bonding temperature, then the failure due to breakdown of the semiconductor device chip was occurred sometime.
Also, in order to prevent short-circuit failure due to a solder layer scrambling up a semiconductor device, the solder layer with its thickness reduced to about 5,000 Å (0.5 μm) was formed by vapor deposition in Patent Reference 3. In Patent Reference 5, to prevent flow of a solder layer, the submount is formed with a solder flow preventing groove to allow the solder to flow into the groove.
By the way, there may be a submount formed with a circuit pattern on which to mount a semiconductor device. A micro-pattern such as of an electrode layer can be formed comparatively with ease if photolithography is used. The photolithography generally uses an alkaline liquid developer such as tetramethyl amine family. According to this method, it is possible to make patterning in unit of 1 μm.
As a specific method of forming an electrode using the photolithography, the lift-off method is prevailing. In the lift-off method, a resist in advance is coated over a surface by a spinning coating apparatus and then patterning is first performed by the photolithography. Thereafter, an electrode is formed in layer by vapor deposition or sputtering and the resist is dissolved to remove portions on the surface of the resist, thereby forming the electrode as desired. In the development by photolithography after patterned exposure, however, a liquid developer when directly contacting with the surface of a submount substrate on which an electrode is to be vapor deposited may corrode and roughen the substrate surface depending on the type of its material.